The U.S. Department of Defense has awarded Intel Federal LLC the second phase of its State-of-the-Art Heterogeneous Integration Prototype (SHIP) program. The SHIP program enables the U.S. government to access Intel’s state-of-the-art semiconductor packaging capabilities in Arizona and Oregon and take advantage of capabilities created by Intel’s tens of billions of dollars of annual R&D and manufacturing investment. The project is executed by the Naval Surface Warfare Center, Crane Division, and administered by the National Security Technology Accelerator.
SHIP is sponsored by the Office of the Under Secretary of Defense for Research and Engineering and funded by the Trusted and Assured Microelectronics program. The second phase of the program will develop prototypes of multichip packages and accelerate advancement of interface standards, protocols and security for heterogeneous systems. SHIP prototypes will integrate special-purpose government chips with Intel’s advanced, commercially available silicon products, including field programmable gate arrays, application-specific integrated circuits and CPUs. This combination of technologies provides new paths for the U.S. government’s industry partners to develop and modernize the government’s mission-critical systems while taking advantage of Intel’s U.S. manufacturing capabilities.
“To ensure that the U.S. defense industry base can continue to deliver state-of-the-art electronics for national security, it is imperative that the Department of Defense (DoD) partners with leading U.S. semiconductor companies,” Nicole Petta, principal director of microelectronics, Office of the Under Secretary of Defense for Research and Engineering. “The DoD microelectronics roadmap recognizes the importance of strategic partnerships with industry. The roadmap also prioritizes and recognizes that as process scaling slows, heterogeneous assembly technology is a critical investment for both the DoD and our nation. SHIP directly contributes to advancing the objectives outlined in the DoD roadmap and the DoD looks forward to working with Intel, a world leader in this technology.”
Heterogeneous packaging allows the assembly of multiple, separately manufactured integrated circuit dies (chips) onto a single package to increase performance while reducing power, size and weight. SHIP provides the U.S. government access to Intel’s advanced heterogeneous packaging technologies, including embedded multi-die interconnect bridge (EMIB), 3D Foveros and Co-EMIB (combining both EMIB and Foveros).
