Accellera Systems Initiative Posthumously Honors Phil Moorby with 2023 Technical Excellence Award

Mr. Moorby honored during DVCon U.S. 2023 for inventing Verilog HDL.

Accellera Systems Initiative (Accellera) announced today that Phil Moorby, the inventor of the Verilog Hardware Description Language (HDL) who passed away in September 2022, is honored posthumously with the Accellera 2023 Technical Excellence Award. The award was established to recognize the outstanding achievements of an individual and their significant contributions to the development of its standards.

Mr. Moorby invented Verilog HDL in 1984 and developed the industry standard simulator Verilog-XL. His continued work to improve Verilog led to the SystemVerilog standard. He was honored with many awards for his work, including the prestigious Phil Kaufman Award in 2005. He also received a Fellow Award from the Computer History Museum in 2016 for his invention and the promotion of Verilog HDL.

“Phil Moorby invented and evolved the Verilog language, which has become the mainstay for the design of devices we all use every day,” stated Martin Barnasconi, Accellera Technical Committee Chair. “He was a mentor to SystemVerilog developers around the globe and his technical contributions and dedication to the industry have left an overarching impact that is beyond measure.”

Mr. Moorby was a British engineer and computer scientist. He studied Mathematics at Southhampton University in England and received his master’s degree in computer science from Manchester University in England. He moved to the United States in 1983. Mr. Moorby passed away on September 15, 2022 at the age of 69 in Rockport, MA.

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