Silicon Integration Initiative Targets New Silicon Carbide Standard SPICE Model

The Si2 Compact Model Coalition has voted to fund and standardize a SPICE model for silicon carbide-based metal-on-silicon field-effect transistors.

The Si2 Compact Model Coalition has voted to fund and standardize a SPICE model for silicon carbide-based metal-on-silicon field-effect transistors. Featuring high efficiency and fast operation with low switching losses, silicon carbide-based metal-on-silicon-field effect transistors are popular in high-growth semiconductor applications such as photovoltaic inverters and converters, industrial motor drives, electric vehicle powertrain and EV charging, and power supply and distribution.

A CMC working group will oversee the model development as part of advancing Si2’s mission to reduce interoperability costs, said Peter Lee, CMC chair. Participating companies include Analog Devices, Cadence Design Systems, Infineon, Qualcomm, Siemens EDA, Silvaco and Synopsys. The decision to launch the working group came after the CMC evaluated the model’s ROI for members and interest by the industry at large.

“I’d encourage companies with a stake in SiC devices to join this effort and help guide selection of the model which best represents their intended use,” advised Lee. “They can benefit from both cost reduction that comes from shared model support and a standardized and qualified model that has ongoing bug fixes and requested feature enhancements from many like-minded companies.”

“Next Generation SiC MOSFETS has many features that make them suitable, and even superior to legacy silicon solutions, for several high voltage applications. While the devices can handle high-temperature and voltage, its minimal ON-resistance allows smaller packages and better energy savings than comparable silicon devices,” stated Colin Shaw from Silvaco, the working group chair.

Exit mobile version