Baya Systems and Blue Cheetah Analog Design today announced the availability of a combined chiplet-optimized Network on Chip (NoC) and Physical Layer (PHY) interconnect IP solution. Integrating Baya Systems’ WeaveIP NoC, and Blue Cheetah BlueLynx Die-to-Die (D2D) PHY IP solves many of the complexities of chiplet interconnect, greatly simplifying the architecture and design process for chiplet-based systems.
Systems-on-chip (SoCs) have driven the rapid growth in tightly integrated processing solutions needed for today’s complex, high-performance applications. An evolution of SoCs, chiplet-based designs enable more cost-effective integration of best-in-class subsystems at scale. Both approaches commonly use a NoC to connect various subsystems. The NoC replaces dedicated point-to-point connections with intelligent network infrastructure across a chip or package, providing a more efficient interconnect that eases design complexity. With chiplet-based designs, the subsystems reside on various chiplets, which may come from different foundries or process technologies but are packaged as one. Each chiplet may have unique physical requirements but needs to communicate efficiently with others, which requires robust D2D PHY interconnect solutions.
“Almost all modern SoC designs use Networks on Chip (NoCs) to move data between heterogeneous computing elements. Multi-die implementations introduce another layer of complexity to fabric and cache architecture,” said Nitin Dahad, Editor-in-Chief of embedded.com and EE Times correspondent. “Overcoming these complexities with a combined NoC and Physical Layer (PHY) to address the challenges of latency, bandwidth, and throughput could pave the way for a more efficient and optimized chip design and support the growth of a chiplet-based economy that many system developers and integrators would benefit from.”
While chiplets simplify individual subsystems, chiplet-based designs can be substantially more complex. To solve this, Baya Systems’ WeaverPro™ software provides a data-driven platform that algorithmically optimizes designs from concept to post-silicon tuning. This enables SoC designers to extend their skills to create a chiplet-ready system architecture that is globally and locally optimized. Baya also offers Cache Studio, which enables system architects to develop optimal memory and cache architectures, and Fabric Studio, which allows designers to create data-driven system microarchitecture with its unified fabric, optimized with cycle-accurate simulation of actual workloads.
“Baya’s platform designs the subsystems at a digital level, and combining it with Blue Cheetah’s PHY connects them physically,” said Sailesh Kumar, CEO of Baya Systems. “In partnership, we provide system architects with a state-of-the-art platform and powerful tools to create the most innovative and cost-effective chiplet-based products.”
“Blue Cheetah and Baya Systems share a common vision to advance chiplet-based development by providing highly optimized, fully customizable interconnect solutions,” said Elad Alon, CEO of Blue Cheetah. “Customers need the capability to tailor solutions for specific applications and workloads. At the same time, they want to reap the advantages of working within the context of industry standards. Our solutions deliver on both, offering standards-based customizability.”
Blue Cheetah’s BlueLynx interconnect IP provides D2D PHY and link layer interfaces and supports Universal Chiplet Interconnect Express (UCIe) and Open Compute Project (OCP) Bunch of Wires (BoW) standards. BlueLynx connects to on-die buses and NoCs with various standards, including AMBA® 4 CHI, AXI, and ACE. Blue Cheetah interconnect IP solutions are being delivered today using many advanced process technologies across multiple foundries and supporting standard and advanced packaging technologies.
