DesignCon, the nation’s largest event for chip, board, and systems design engineers, today announced new areas of focus for the 2020 edition highlighting advances in the fields of 5G, artificial intelligence (AI), automotive, and IoT, producing the most in-demand electronics emerging today. Topics will be examined through a 14-track conference schedule spanning technical sessions, boot camps, tutorials, and more to fit the needs of the hardware design engineering community. DesignCon returns to Silicon Valley for its 25th year, taking place from January 28-30, 2020 at the Santa Clara Convention Center. If interested in attending as press, please register at this link: designcon.im.informa.com/2020/registrations/Media.
The DesignCon conference and expo reflects the design engineering industry’s growing need for breakthroughs in the development of 5G connectivity, AI, automotive electronics, and IoT. With worldwide spending on AI systems forecasted to reach $79.2 billion in 2022, sales of automotive electronic systems at its highest growth rate on-record, expected worldwide spending on IoT projected to surpass $1 trillion in 2022, and the 5G infrastructure market estimated to reach $4.2 billion in value by 2020, DesignCon is the ideal forum for attendees across these interlaced industries to exchange ideas and develop solutions to meet consumer demand.
“The market and value for connected, especially fast connected products, is on the rise,” said Suzanne Deffree, brand director, Intelligent Systems & Design, Informa Markets. “DesignCon is the most comprehensive event available to the design engineer community, enabling attendees to collaborate toward these growing opportunities and innovate beyond current demand. We pride ourselves on being the industry’s leading educational event, helping the brightest minds understand and master the latest technology and applications on the market.”
The DesignCon premier educational conference is curated by the Technical Program Committee (TPC), an expert panel of more than 90 industry professionals who review and update the curriculum each year to meet the needs of the ever-evolving high-speed communications and semiconductor industry.
Featured conference content of interest at DesignCon 2020 include:
Currently, EDA has no roadmap for machine learning (ML) and AI with a timetable to meet design and manufacturing needs. A roadmap would provide a framework to study targeted ML/AI functions and describe dependencies between industry organizations. Defining functional needs with business goals will identify methodology gaps for new R&D from industry and academia. In this panel, industry and academic experts will discuss and debate the following areas critical to developing an EDA ML/AI roadmap: concept unification, software interoperability, high-volume data handling and exchange, and learning from other disciplines.
During this technical session, Dmitry Klokotov, staff signal integrity engineer at Xilinx, will present a system-level study of power supply noise coupling between different power distribution networks. The system is built around a large programmable SoC device, which is currently used in a variety of cutting-edge applications such as AI, Cloud, IoT, etc. An SoC chip hosts many different blocks with different power demands, restrictions, and requirements. Different blocks need to operate side by side and interact with each other. Insuring power integrity of such a system becomes challenging and it is particularly difficult to manage noise coupling via a shared return path. Klokotov’s power integrity study covers pre-silicon modeling, hardware verification, and correlation steps.
Photonic integrated circuits are rapidly advancing in several applications, such as datacom and telecom, virtual reality, sensors, automotive, and medical applications. Validated, unified Electronic/Photonic Design Automation (EPDA) tool flows are key to bringing standardization and scalability to silicon photonics, including implementing 5G and WiGig. This tutorial will introduce a PDK-based design flow enabling RF designs for 5G and WiGig. Experts from leading EDA and photonics design tools vendors will demonstrate how close integration between schematic capture, electronic-photonic co-simulation, and layout tools, together with electronic/photonic PDKs delivers silicon-proven 5G designs. Attendees will learn about EPDA co-design and co-simulation, as well as photonic-specific compact model libraries (CMLs), in addition to getting hands-on experience with the latest EPDA design tools and foundry PDK.
LIDAR (Light Detection and Ranging) is widely considered a necessity for fully automated self-driving automotive applications. In order to sample the far field with sufficient resolution, LIDAR systems must incorporate either a large number of optical emitters or a means of steering the optical emission from a small number of outputs across the far field. Due to the density of optical components required, LIDAR is ripe for optical integration in order to achieve miniaturization and scalable manufacturability. This talk will give an overview of LIDAR techniques, the components required for a chip-scale LIDAR solution, and the state of the art in silicon photonics with respect to this goal.
To view the full DesignCon 2020 conference schedule, please visit here.
DesignCon 2020 is also supported by The Institute of Electrical and Electronics Engineers (IEEE), offering its accreditation to conference attendees. Each conference hour is eligible for one professional development hour (PDH), and 10 PDH’s result in one continuing education unit (CEU) and an official IEEE certificate. IEEE accreditation can be used to meet training requirements, stand out to future employers, and maintain an engineering license.