By John Blyler, Contributing Editor
In the last few decades, digital event-driven simulation has largely relied on underlying hardware for performance gains. Past efforts to accelerate simulation with special-purpose hardware have repeatedly fallen behind the ever-improving performance of general-purpose computers, enabled by Moore’s Law. But Moore’s Law is ending, and the time is right to fundamentally rethink simulation algorithms, methodologies, and computational strategies.
With these opening remarks, Serge Leef, Program Manager at the Defense Advanced Research Projects Agency (DARPA), began his talk at DAC 2021. During the presentation, he examined the past and a possible future of simulation as a key technology enabler for advanced chip designs.
Many factors have led to the need for next-generation SoC designs, from the increasing expense of chip designs to the growing integration needs of complex SoCs. To overcome these challenges, Serge argued for an energizing of EDA innovations in four specific areas: platform-based design, system synthesis, advanced simulation, and secure silicon.
The platform-based design approach will enable the automated creation of accelerators. By moving software functions into hardware, more accurate estimates of the impact of system-level design decisions can be made. Further, it will be possible to have both hardware and software reconfigurability at run time by using machine learning (ML) to predict the optimal hardware-software partitioning during the execution in response to real-time data and operational scenarios.
System synthesis will permit the architectural exploration of RTL synthesis, noted Leef. He explained how a user would select a platform and supply a cost function with size, performance, power, and security goals to guide combinatorial optimization to find the best architectures. These results would then be presented to the user for assessment and selection.
Advanced simulation will be necessary to achieve significant innovation in EDA tools. The problem is that simulation physics limits were reached decades ago and rely on Moore’s law for speedups. Another issue is that parallel simulation has not been revisited since the emergence of cloud computing. Further, the emergence of Machine Learning has not been employed to drive the creation of faster models.
“The industry needs to rethink simulation in light of advances in high-performance computers (HPCs), Cloud, and Machine Learning,” observed Leef.
The last area of focus should be on developing on-chip security engines to create secure silicon. While there are many effective outer perimeter attack strategies, there are few ways to secure the inner perimeter with on-chip structures. There need to be multiple layers of security as well as ways to secure the entire chip development supply chain.
DARPA is working hard to energize and facilitate EDA innovation. But there is much to do, which is why Serge highlighted a recent DARPA initiative to help advance EDA tools to help jump-start chip design companies and substantially improve the economics for future US chip startups.
One way to achieve this goal is with the DARPA Toolbox Initiative, which aims to reduce the reliance on low-quality, low-cost tools and IP that increase the execution risks and complicate post-DARPA transitions.
“Through this mechanism, our teams of researchers will have access to commercial vendors’ IP and tools via pre-negotiated, low-cost, non-production access frameworks under simplified legal terms. For commercial EDA and IP vendors, DARPA Toolbox will provide an opportunity to leverage the agency’s brand equity, insights into forward-looking research, and a chance to develop new revenue streams.
