We have extended our submission deadline to Friday, June 10th. Finalists will be announced prior to SEMICON West. The winner will be announced Wednesday, July 13, 2022 at SEMICON West.
Sen. Mark Warner, Semiconductor Industry Execs Meet to Discuss Strengthening Domestic Chip Research, Design, Manufacturing
The Semiconductor Industry Association (SIA) today convened a productive roundtable discussion between Sen. Mark Warner (D-Va.) — one of the senators tasked with negotiating the U.S. jobs and competitiveness package — and more than a dozen senior executives from SIA member companies.
Top Three Suppliers Held 94% of 2021 DRAM Marketshare
Samsung, SK Hynix accounted for 71% of DRAM sales. Major supplier base now reduced to six.
Semiconductor Growth Still Seen at 11% Despite 2022 Headwinds
New quarterly update shows higher gains in microprocessors and power discretes this year, but lowers sales increases in optoelectronics while the global economy faces greater risks.
Mitsubishi Electric Expands Silicon Carbide Power Device Lineup With Industry Standard Package Dual Device
Mitsubishi Electric US, Inc. recently launched a new Silicon Carbide (SiC) power module FMF400DY-24B.
RISC-V Summit China 2022 Announces Call for Papers
The Summit will showcase the continued rapid expansion of the RISC-V ecosystem, with both commercial offerings and exciting open-source developments.
Global Embedded Die Packaging Technology Market to Generate $311.41 Million by 2030
Increase in requirement for miniaturization of electronic circuits in microelectronic devices drives the growth of the global embedded die packaging technology market.
Supplyframe to Showcase Supply Chain Resiliency at the Gartner Supply Chain Symposium/Xpo 2022
Supplyframe today announced that the company will participate in the Gartner Supply Chain Symposium/Xpo, being held June 6-8, 2022, at the Walt Disney World Dolphin Resort in Orlando.
CEA-Leti & Intel Report Die-to-Wafer Self-Assembly Breakthrough Targeting High Alignment Accuracy and Throughput
In a breakthrough for the future of die-to-wafer (D2W) bonding, CEA-Leti and Intel have optimized a hybrid direct-bonding, self-assembly process that has the potential to increase the alignment accuracy as well as fabrication throughput by several thousand dies per hour.
ClassOne Technology and Fraunhofer ENAS to Collaborate on Hybrid Bonding for Advanced Imaging Devices
Partnership will leverage firms’ respective heterogeneous-integration proficiencies to focus on development and optimization of full process-integration schemes for diverse high-density pixel array applications.
